__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_set_trap_table),
- "b" (table) );
+ "b" (table) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_mmu_update),
- "b" (req), "c" (count) );
+ "b" (req), "c" (count) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_console_write),
- "b" (str), "c" (count) );
+ "b" (str), "c" (count) : "memory" );
return ret;
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_set_gdt),
- "b" (frame_list), "c" (entries) );
+ "b" (frame_list), "c" (entries) : "memory" );
return ret;
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_net_io_op),
- "b" (op) );
+ "b" (op) : "memory" );
return ret;
}
int ret;
__asm__ __volatile__ (
TRAP_INSTR
- : "=a" (ret) : "0" (__HYPERVISOR_fpu_taskswitch) );
+ : "=a" (ret) : "0" (__HYPERVISOR_fpu_taskswitch) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_sched_op),
- "b" (SCHEDOP_yield) );
+ "b" (SCHEDOP_yield) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_sched_op),
- "b" (SCHEDOP_block) );
+ "b" (SCHEDOP_block) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_sched_op),
- "b" (SCHEDOP_exit) );
+ "b" (SCHEDOP_exit) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_network_op),
- "b" (network_op) );
+ "b" (network_op) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_block_io_op),
- "b" (op) );
+ "b" (op) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_set_debugreg),
- "b" (reg), "c" (value) );
+ "b" (reg), "c" (value) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_get_debugreg),
- "b" (reg) );
+ "b" (reg) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_update_descriptor),
- "b" (pa), "c" (word1), "d" (word2) );
+ "b" (pa), "c" (word1), "d" (word2) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_set_fast_trap),
- "b" (idx) );
+ "b" (idx) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_kbd_op),
- "b" (op), "c" (val) );
+ "b" (op), "c" (val) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_update_va_mapping),
- "b" (page_nr), "c" (new_val), "d" (flags) );
+ "b" (page_nr), "c" (new_val), "d" (flags) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_set_trap_table),
- "b" (table) );
+ "b" (table) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_mmu_update),
- "b" (req), "c" (count) );
+ "b" (req), "c" (count) : "memory" );
if ( unlikely(ret < 0) )
panic("Failed mmu update: %p, %d", req, count);
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_console_write),
- "b" (str), "c" (count) );
+ "b" (str), "c" (count) : "memory" );
return ret;
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_set_gdt),
- "b" (frame_list), "c" (entries) );
+ "b" (frame_list), "c" (entries) : "memory" );
return ret;
int ret;
__asm__ __volatile__ (
TRAP_INSTR
- : "=a" (ret) : "0" (__HYPERVISOR_fpu_taskswitch) );
+ : "=a" (ret) : "0" (__HYPERVISOR_fpu_taskswitch) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_sched_op),
- "b" (SCHEDOP_yield) );
+ "b" (SCHEDOP_yield) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_sched_op),
- "b" (SCHEDOP_block) );
+ "b" (SCHEDOP_block) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_sched_op),
- "b" (SCHEDOP_exit) );
+ "b" (SCHEDOP_exit) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_set_debugreg),
- "b" (reg), "c" (value) );
+ "b" (reg), "c" (value) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_get_debugreg),
- "b" (reg) );
+ "b" (reg) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_update_descriptor),
- "b" (pa), "c" (word1), "d" (word2) );
+ "b" (pa), "c" (word1), "d" (word2) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_set_fast_trap),
- "b" (idx) );
+ "b" (idx) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_kbd_op),
- "b" (op), "c" (val) );
+ "b" (op), "c" (val) : "memory" );
return ret;
}
__asm__ __volatile__ (
TRAP_INSTR
: "=a" (ret) : "0" (__HYPERVISOR_update_va_mapping),
- "b" (page_nr), "c" ((new_val).pte_low), "d" (flags) );
+ "b" (page_nr), "c" ((new_val).pte_low), "d" (flags) : "memory" );
if ( unlikely(ret < 0) )
panic("Failed update VA mapping: %08lx, %08lx, %08lx",